WinChip
WinChip (Win tip) is a CPU brand of the x86 architecture that Centaur Technology company which was a subsidiary of IDT company ever developed.
The manufactured series includes WinChip C6, WinChip 2. In addition, it was planned, but WinChip 3, WinChip 4 did not lead to a mass production, too.
Table of contents
Summary
It is Socket 7 same as Pentium, and the interface with the outside is placed as the third Socket7 compatible CPU following the Cyrix 6x86 series, the AMD K5/K6 series. An important point is put in the WinChip architecture realizing performance at the same level as Pentium unlike having aimed at the CPU that two precedence is higher-performance than Pentium (they can be opposed to Pentium II) as possible less costly. Therefore I take the extremely simple architecture and can execute only 1 order per 1 clock without adopting the super scalar architecture such as Pentium (in WinChip after two, 2 orders are feasible according to the later description at the same time which only MMX order or 3DNow! order is). From this, it may be said that i486 before the first generation is near rather than Pentium. A core part becomes the RISC method and carries it out after converting each machine language order into an RISC order, but plans reduction of レイテンシ by allowing you to convert almost none of of the x86 instruction showing frequent use into a single RISC order. I show performance equal to Pentium of the clock by this and an effect of the large-capacity primary cash called 64kBytes (order 32kBytes, data 32kBytes). Because internal structure is simplified, it is cheaper than the product of other companies, and there is characteristic that it has low power consumption. But it was difficult to raise a movement clock because a pipeline was shallow with five steps. In addition, I cope with the MMX which is a multimedia extended instruction set of Intel from early WinChip C6. However, movement clock frequency was low, and it was hardly adopted to a PC made in a maker with up to 240MHz because absolute performance was low.
Evaluation as upgrading parts
Because it became the single power supply specification (as for the voltage with 3.3V version and two kinds for 3.52V) not to separate Vcore and Vio to WinChip 2A, it was available in Socket 5 although being out of security. In addition, movement compatibility with Pentium was high, and even the old BIOS that did not assume a CPU except Pentium often worked (in 6x86 and K6, support by the BIOS was a premise). Furthermore, WinChip was available for magnification setting with the old motherboard with the limit when I set it to 1.5 times on the motherboard side to recognize it as 4 times. Therefore, I was often operated without a problem in the environment of Pentium(P5 system) and was popular as upgrading parts of the PCs which was old partly because a price was reasonable (I recognize only WinChip2 rev.A to be 3.5 times).
Product of each generation
WinChip C6
I was announced in May, 1997.
The WinChip C6 showed the transaction speed that was approximately equal to Pentium of the clock about the integer arithmetic, but operation speed was inferior because only a part of the FPU order was made a pipeline about the floating point arithmetic. In addition, I coped with an MMX order, but was greatly inferior in the processing capacity in comparison with MMX Pentium which was feasible by 2 orders at the same time because a practice unit was one.
As for the movement clock frequency, four kinds of 180,200,225,240MHz were performed a lineup of. That because there is only the setting of the integral multiple of the outside clock as for the internal clock magnification, is for high-end 240MHz, and must drop outside clock to 60MHz (60MHz *4), and IO performance decreases in comparison with Pentium 233MHz (66MHz *3.5); had a problem.
WinChip 2
I was announced in May, 1998.
Improvement is added to floating point arithmetic and the MMX which were a weak point of the WinChip C6 in WinChip 2. I improved throughput by making all the FPUs a pipeline about the floating point arithmetic. In addition, MMX processing units are built more, and 2 orders become feasible at the same time (an integer and the floating point arithmetic order become the processing by 1 order as well as before). In addition, this MMX processing unit was expanded to cope with AMD 3DNow! order.
I came to show processing capacity equal to Pentium of the clock by these improvement in integer arithmetic, floating point arithmetic, all of MMX.
It was for 240MHz, and, as for the problem that must drop an outside clock to 60MHz, there just remained it without changing with WinChip C6 about movement clock frequency and the internal clock magnification. It was announced, but the 266MHz version (66MHz *4) was not shipped after all.
WinChip2 Rev.A (the following, WinChip2A and notation) for a minor change in 1999 was announced. WinChip2A supported Super Socket 7 standard of outside clock frequency 100MHz, and setting of the 0.5 times chopping fine allowed the movement clock magnification. Furthermore, I supported 2.33 times, the irregular clock magnification of 3.33 times.
Grade indication by the speed grade (PR rating and about the same thing) was made not conventional true clock indication in WinChip2A, and, in high-end WinChip2A-266, a true clock and the grade indication that were true clock 233MHz (100MHz *2.33) did not agree.
The road map that was not realized
Centaur Technology company announced the following as a road map after WinChip 2A.
- Low power consumption plans becoming it by separating WinChip 2B - Vcore and Vio, and lowering Vcore to 2.8V.
- I increase WinChip 3-1 next cash in quantity in 128kBytes (order 64kBytes, data 64kBytes) and plan a mobile version of 2.2V if Vcore is for a desktop of 2.8V.
- I largely change WinChip 4 - core and comprise a divergence prediction system having high 11 steps of pipelines and hitting ratio and plan movement clock improvement.
However, because Centaur Technology company was sold to Taiwanese VIA Technologies company in August, 1999, these plans stopped it without being sold, and the production of WinChip2 was canceled, too. The core part of WinChip 4 is used as a core of C3 of VIA company afterwards.
Lineup
| Processor | Frequency (P-Rate) | FSB | Package | L1 cache | FPU | Expansion order | Pipeline stage | Transistor | Manufacturing process | The core voltage | Correspondence socket |
|---|---|---|---|---|---|---|---|---|---|---|---|
| WinChip C6 | 180-240MHz | 60, 66MHz | CPGA 296pin | 64KB | 50% | MMX | 5(4) | 5,400,000 | 0.35μm | 3.3 or 3.52 (single) | Socket 5 or 7 |
| WinChip 2 | 200-240MHz | 60, 66, 75MHz | CPGA 296pin | 64KB | 50% | MMX, 3DNow! | 5(4) | 6 million | 0.35μm | 3.3 or 3.52 (single) | Socket 5 or 7 |
| WinChip 2 rev.A | 200-233MHz (PR200-266) | 60, 66, 75, 100MHz | CPGA 296pin | 64KB | 50% | MMX, 3DNow! | 5(4) | 6 million | 0.25μm | 3.3 or 3.52 (single) | Socket 5 or 7 |
| (WinChip 2 rev.B) | 200-233MHz (PR200-266) | 60, 66, 75, 100MHz | BGA | 64KB | 50% | MMX, 3DNow! | 5(4) | 6 million | 0.25μm | 2.8 (dual) | ― |
| (WinChip 3) | 200-266MHz | ― | CPGA 320pin, BGA, MobileModule | 128KB | 50% | MMX, 3DNow! | 5(4) | 10,200,000 | 0.25μm | 2.2-2.8 (dual) | Socket 7 |
| (WinChip 4) | 450-700MHz | 100, 133MHz | CPGA 370pin | 128KB | 50% | MMX, 3DNow! | 11 | 11,600,000 | 0.25-0.18μm | ― | Socket 370 |
Allied item
This article is taken from the Japanese Wikipedia WinChip
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