LOADALL

In LOADALL, CPU 80286 of Intel Corp., 80386 are one of the closed orders that they looked good with.

Table of contents

Summary

The LOADALL order loads all internal registers of the CPU by 1 order so that the name shows it. There cannot be it by the shown x86 instruction to load the デスクリプターキャッシュ part (cached part) in addition to the visible part (visible part) of the segment register. A useful use example of the LOADALL order is to access it as real mode in memory areas more than 1M byte. RAMDRIVE.SYS and HIMEM.SYS of MS-DOS, Windows/386 2.1, OS/2 use LOADALL.

80,286 LOADALL

The operation cord is 0Fh 05h. 80,286 LOADALL reads data from an address of 00800h–00866h regardless of the value of the segment register.

Address	number of bytes	register	register	register	register
00800	6	not used
00806	2	MSW (machine status word)
00808	14	not used
00816	2	TR (task register)
00818	2	flags
0081A	2	IP (instruction pointer)
0081C	2	LDTR (local descriptor table register)
0081E	4x2	DS (data segment)	SS (stack segment)	CS (code segment)	ES (extra segment)
00826	4x2	DI (destination index)	SI (source index)	BP (base pointer)	SP (stack pointer)
0082E	4x2	BX	DX	CX	AX
00836	4x6	ES descriptor cache	CS descriptor cache	SS descriptor cache	DS descriptor cache
0084E	4x6	GDTR (global descriptor table register)	LDT descriptor cache	IDTR (interrupt descriptor table register)	TSS descriptor cache

I cannot return to real mode from protect mode even if I use LOADALL order with 80286. In other words, I cannot clear the PE bit of MSW. However, LOADALL order does not have to enter the protect mode to access storage devices more than 1MB if there is it.

80,386 LOADALL

The operation cord is 0Fh 07h. 80,386 LOADALL reads data from address ES:EDI. ES is not デスクリプターキャッシュ part, and a visible part of ES is used.

Address	number of bytes	register	register	register	register
ES:EDI+00	4	CR0 (control register 0)
ES:EDI+04	4	EFLAGS
ES:EDI+08	4	EIP (instruction pointer)
ES:EDI+0C	4x4	EDI (destination index)	ESI (source index)	EBP (base pointer)	ESP (stack pointer)
ES:EDI+1C	4x4	EBX	EDX	ECX	EAX
ES:EDI+2C	2x4	DR6	DR7
ES:EDI+34	4	TR (task register)
ES:EDI+38	4	LDTR (local descriptor table register)
ES:EDI+3C	4x2	GS (extra segment)	not used	FS (extra segment)	not used
ES:EDI+44	4x2	DS (data segment)	not used	SS (stack segment)	not used
ES:EDI+4C	4x2	CS (code segment)	not used	ES (extra segment)	not used
ES:EDI+54	4x12	TSS descriptor cache	IDT descriptor cache	GDT descriptor cache	LDT descriptor cache
ES:EDI+84	4x12	GS descriptor cache	FS descriptor cache	DS descriptor cache	SS descriptor cache
ES:EDI+B4	2x12	CS descriptor cache	ES descriptor cache

Allied item

• 32 bits - x86
• 64 bits - x86-64

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This article is taken from the Japanese Wikipedia LOADALL

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