2017년 4월 20일 목요일

VIA C3

VIA C3

VIA C3 (via sheath Lee) was a CPU of the x86 architecture for the personal computer which Taiwanese VIA Technologies (VIA) developed, and C3 has been ever sold in the name called Cyrix III (rhinoceros Rix three). C3, CyrixIII is based on a core of Centaur Technology which I designed of the WinChip series that VIA purchased together from IDT. VIA C7 (sea seven) was announced as a succeeding product in 2005.

I describe VIA C3 and VIA CyrixIII in this clause.


Table of contents

Cyrix III

 
Samuel(C5A) CyrixIII processor

Cyrix III (rhinoceros Rix three) is the company's first CPU product which VIA announced in 2000.

I announced the debut with the Joshua deployment product by the design of the Cyrix team which VIA purchased from National Semiconductor at first, but it was the Samuel core deployment product by the Centaur team which similarly VIA purchased from IDT though there was not really an announcement with the released product. For having adopted a brand of Cyrix sequentially though I am based on the WinChip series, I state that I utilize Cyrix brand with the results as a CPU maker in VIA.

I target a low-end PC market, and it was said that I aim at the acquisition of 10% of shares at first in x86CPU market, but was not adopted in a major PC maker. A product brand was changed to C3 after the later Samuel2 core deployment product, and CyrixIII was finished.

Samuel (C5A)

Samuel (Samuel) is developed based on WinChip 4 core and is the CPU core which VIA cast into the market first. For distinction with Samuel2 spent later, I may be referred to Samuel1 core.

Samuel was not equipped with a second level cache, and the floating point number arithmetic unit (FPU) worked in half clock frequency of the movement clock. In addition, I support 3DNow! as a multimedia expansion order, but can process only an order of either at a time because I handle MMX order and the 3DNow! order with an MMX unit. Therefore I was inferior to other competitive products in the core overall performance.

I am prepared by a 0.18μm process, and dghaisa is is small, and the wiring adopts wirebonding because I am comprised of the number of few transistors. Therefore, I do a cheap point to be able to also realize low power consumption with a merit for a competitive product and support electric power saving technology Long Haul. The CPU equipped with Samuel core was sold with a brand of Cyrix III, but the product that a print of VIA C3 was done while carrying Samuel core later appeared.

Joshua

Joshua (Jehosua) is a CPU core developed based on Gobi core. I am prepared by a 0.18μm process of National Semiconductor and work with the core voltage of 2.2V. In addition to seven steps of pipelines, it is equipped with an L1 cache of 64KB and a second level cache of 256KB. I support 3DNow! as a multimedia expansion order.

It was said that the correspondence platform was compatible with Socket 370 of FSB133MHz, and the performance index planned the adoption of the PR rate not notation with a true clock like a product of old rhinoceros Rix.

The rumors such as strategies of VIA which expected the high product of the mass quitting a job of the Cyrix team member and the true clock exist about the cancellation of Joshua, but the official announcement is unidentified without being done at all. After Joshua, the product by the Cyrix team is not announced.


C3

 
Ezra(C5C) C3 processor

C3 is the CPU product which VIA announced in 2001. It is a succeeding product of CyrixIII and becomes the first model of the VIA C series. I almost succeeded a characteristic of CyrixIII, but the Mini-ITX platform which was equipped with point and C3 where a basic performance enhancement with the improvement and the low heat generation of core were low power consumption, and was released came to be evaluated in one's own PC market and the group market which included it and succeeded in building the constant position in x86 CPU market.

C3 is made with P6 bus licensing agreement with Intel having been completed in March, 2006 and is finished and shifts to C7 which adopted VIA's original V4 bus as a succession product.

Cool Processing was appealed to for as catch copying to appeal to for C3.

Samuel2 (C5B)

シュリンク does Samuel to 0.15μm, and Samuel2 (Samuel two) is the product which I added an L2 cache of 64kB to. In addition, LongHaul is improved in v2, too.

Because the added L2 cache is an exclusion type with the L1 cache of the thing which is small capacity, the use in the high efficiency is possible in an L2 cache than Celeron. Therefore, I became able to be opposed to a competitive product by the application of office which used many integer arithmetic origin. However, the FPUs which worked in half clock frequency did not change and did not extend to the competitive product as an overall performance.

VIA changed the brand name to C3 with product injection of this Samuel2. The reflection to a product package was not enough at first, and "Cyrix III" and the printed product were sold while carrying Samuel2.

Ezra (C5C)

Ezra (Ezra) is the product which シュリンク made a manufacturing process of Samuel2 to 0.13μm. The core voltage was reduced to 1.35V with miniaturization, and the improvement of the movement clock was planned. But the dghaisa is is not changed by Samuel2. 670, Ezra are 678, and, in CPUID, Samuel2 does not fold strange straw into the MODEL ID as 7 probably because there is not a particularly big change though a name is changed from Samuel2(C5B) to Ezra(C5C), and only the STEPPING ID is changed from 0 to 8.

The retail package which a design made a tuck-box was sold and became the topic.

Ezra-T (C5M/C5N)

Ezra-T (Ezra tea) is the product which let AGTL where a system bus of Ezra is adopted in Pentium III(Tualatin) support. The change that a capacitor was added to on the surface was carried out with the product of the CPGA package. There is not other big change.

Nehemiah

Nehemiah (Nehemiah or near Maia) is a core of the C3 processor that improvement was largely carried out from a product conventionally which continued being the minor change of the Samuel core. As for the core referred to merely Nehemiah, plural models exist.

C5XL

 
Nehemiah(C5XL) C3 processor

C5XL is a product spent as Nehamiah core first, and changes include the following.

  • I increase the number of the pipeline stages to 16 from 12
  • The full speed of the FPU
  • I abolish support of 3DNow! and am equipped with SSE unit. Simultaneous handling of MMX and SSE was in this way enabled.
  • The L2 cache is changed to 16 ウェイセットアソシエイティブ by 4 ウェイセットアソシエイティブ
  • The addition of two hardware random number generators. I put plural free running oscillators together, and bit string with quantum-like behavior is produced. [1]
  • I add the CMOV order that a core to Ezra-T did not support and am compatible with i686 perfection.

In addition, a capacitor was added with the product of the CPGA package more than Ezra-T, and, as for the marked logo design, some changes were done. However, a capacitor was corrected to a number same as Ezra-T afterwards with there not being an announcement.

C5P

 
CPGA, EBGA, C3 of the nanoBGA package

C5P is an improved model of C5XL, and the following improvement is given by C5XL.

  • In correspondence with APIC, a dual CPU was enabled. The product which carried Nehemiah two was released from VIA.
  • Support of 200MHz FSB
  • Support of hardware AES speedup function Pad Lock
  • It is reduction to 0.90-1.00 with the core voltage
  • BGA package of dghaisa is 47mm2
  • Package size is nanoBGA package of 15mm *15mm

A collecting mawashi of the wiring was difficult, and though a small maker designed the nanoBGA-adaptive motherboard, I had a problem, and the nanoBGA package was stopped producing because of size.

C5X

VIA planned the injection of C5X as a high-ranking model of C3 of the Nehemiah generation at first. In addition to improvement in C5XL, the plural number order of order decode, an MMX unit, SSE unit, the integer arithmetic unit enables processing at the same time, and this was going to increase an L2 cache in 256kB 16 ウェイセットアソシエイティブ, but C5X is canceled, and a product was not released.

Derivative

 
Mobile C3 processor of the EBGA package

Eden / C3-E

Eden (Eden) and C3-E (sheath Lee E) are brand names of the product for integration which adopted BGA package. Each core in itself is equal and is common, but it names a fanless thing Eden processor with C3 processor in particular.

The details refer to "VIA Eden"

In addition, brand in itself of Eden follows a fanless product for integration using the C7 core of the C3 succession and is used.

Cyrix III Mobile

The mobile CPU which Cyrix III Mobile (rhinoceros Rix three mobile) was based on CyrixIII of the Samuel core, and was announced in 2000. I adopt Socket 370 on a platform, and reshuffling of Performance Mode and Power Saving Mode is possible, and it was said that I realized 50% of power consumption reduction and downsizing from CyrixIII by power-saving technical Long Haul, but the adoption example is not confirmed.

Mobile C3

The mobile CPU which Mobile C3 (mobile sheath Lee) was based on Ezra core, and was announced in 2001. Three kinds of the product which adopted EBGA package and MicroPGA package other than the product which adopted product for desktops and common Socket 370-adaptive CPGA package exist, and the core voltage is controlled lower than a desktop version, too. It was adopted with a notebook PC made in some Taiwanese makers.

Antaur / C3-M

The mobile CPU which Antaur (Ann ter) was based on C5XL Nehemiah, and was announced in 2003. Only a 1GHz version with the EBGA package which held height in check to 1.5mm was provided. I hold down the voltage core than a desktop version and am equipped with PowerSave 2.0 as a power-saving technique, and TDP becomes 11w. It was adopted with a notebook PC made in some Taiwanese makers.

Antaur was renamed with brand reorganization of VIA in 2005 by C3-M (sea 3M).

CoreFusion

CoreFusion (core fusion) is the product which became the one tip which integrated a northbridge with C3 processor. There is not the performance merit, but is a product for markets making much of size and weight, power consumption. Luke (rook) which integrated CN400 with Mark (mark) which unified CLE266 is performed a lineup of.

1Giga Pro

1Giga Pro (one giga professional) is an OEM version CPU of Samuel2 core C3 for EBGA equipped with by a motherboard released in 2002 by PC Chips. [2]I am named 1Giga, but am really driven at 733MHz.

specifications stockinette stitches

Processor VIA Code Centaur Code Frequency
(MHz)
 FSB
(MHz)
 L1
Cash
(kB)

 L2
Cash
(kB)

 FPU
Movement frequency
 Pipeline
The number of the stages
 Max TDP
(W)
 The core voltage
(V)
 Manufacturing process
(nm)
CyrixIII Joshua ― (PR) 433-533 66/100/133 64 256 100% 7 Ignorance 2.2 180
CyrixIII Samuel C5A 500-667 100/133 128 0 50% 12 8.5 1.9-2.0 180 Al
C3 Samuel2 C5B 700-800 100/133 128 64 50% 12 12 1.6-1.65 150 Al
C3 Ezra C5C 800-950 100/133 128 64 50% 12 15 1.35 150/130 Al
C3 Ezra-T C5M 800-950 100/133 128 64 50% 12 15 1.35 150/130 Cu
C3 Ezra-T C5N 800-1000 100/133 128 64 50% 12 15 1.35 130 Cu
(C3) Nehemiah C5X 1-1.4GHz 133 128 256 100% 16 20 1.4-1.45 130 Cu
C3 Nehemiah C5XL 1-1.4GHz 133 128 64 100% 16 20 1.4-1.45 130 Cu
C3 Nehemiah C5P 1-1.4GHz 133/200 128 64 100% 16 20 1.4-1.45 130 Cu


Design thought of the CyrixIII/C3 series

CyrixIII and C3 are inferior to a competitive product with the absolute performance and clock, but are characterized by it is cheap and can produce it much than it smaller and being electric power saving. It became the product which appealed to the embedded system market by this.

  • Because the memory performance is a factor to control performance in many benchmarks, the VIA processor implements a big L1 cache and big TLB, aggressive pre-fetch in various functional enhancements. These functions are not VIA original things, but do not reduce a function to optimize memory access to hold down dghaisa is. A certain 128kB L1 cache always characterizes one of Centaur/VIA designs.
  • The clock frequency is arrested as the above-mentioned thing which the number of the orders that I can handle in 1 cycle increases by the general words. I do not choose the implementation of the complicated function such as the out of order practice. Improvement of the clock frequency is difficult, and there are demerits such as extra dghaisa is increase or the increase of the power consumption again to implement the complicated logic, and this is because the performance hardly goes up it by relatively several types of application. Atom which Intel developed later follows similar design thought.
  • The pipeline is adjusted to register - memory interval used in a x86 instruction well, the order of the form between memory - registers to carry it out with 1 clock. I execute some orders used well at few clock speeds in comparison with other x86 processors.
  • I am implemented in microcode, or the x86 instruction that is not used very much is emulated by other orders. I can save dghaisa is, and power consumption is in this way held down. The influence by the used main application is really minimal.
  • These design policies were derived from a claim of the RISC of the material. In other words, smaller instruction set, better optimization are connected in doing performance of the whole CPU fast.

Adoption example of the CyrixIII/C3 series

As for the large-scale adoption example of the thing that the model whom CyrixIII was a low-priced model of the small PC maker and employed was announced [3], the presence in the processor market was extremely thin without VIA announcing it.

A brand name was changed to C3, and after that there was not the example adopted to the PC product of the major maker either, but it was adopted and did it, and some presence showed even a product made in maker PC market to the super low price PC of Wal-Mart [4] and the volume sales system company such as the E mountain [5].

In addition, in the market which a group included, it was adopted to a thin client [7] of broadband router [6] and Fujitsu of Sony, an HDD video recorder [8] of Hitachi, Ltd.

VIA made the adoption results with the major maker by C3 and succeeded in putting CPU business on the railroad track.

Episode of CyrixIII/C3

Too strange unique movement is often seen with the other brands in VIA becoming the new entry in the x86 CPU market. I give below an example.

Difference between announcement contents and product specification

  • Cyrix III was announced as the product which carried the Joshua core of the Cyrix team formally, but the Samuel core of the Centaur team was really carried in Cyrix III which came up.
  • C3 which carried Samuel2 core was announced as CPGA package product without ヒートスプレッダ, but, in C3 which came up, a marking of with a package belonging to ヒートスプレッダ identical to CyrixIII and CyrixIII was really done at first. Therefore, measures to give A had it stolen by a clock to say 667AMHz to the product of the Samuel2 core for distinction in the clock model to repeat in Samuel and Samuel2 including 667MHz. The marking was changed to C3, but, as for the package, a thing same as CyrixIII continued being used afterwards.
  • C3 800AMHz which carried Ezra core was announced as core voltage 1.30V, but the product which came up was really core voltage 1.35V. In addition, an engineering sample product was used in the early lot in spite of an official retail package product.
  • I announced that I distinguished it by giving A to a clock to say to the product of the Ezra core for distinction with 800AMHz because Samuel2 and Ezra repeated in some clock models including 800MHz at the time of the announcement of the Ezra core. However, notation of 800AMHz was really used in the 800MHz version of Samuel2 which circulated in large quantities afterwards and was in a condition not to be able to distinguish it when I did not confirm the core voltage.

Other

  • From an image of CyrixIII which carried Joshua of the announced Cyrix team design, CyrixIII/C3 was often introduced first when it was the product of the flow of Cyrix. The product which circulated widely is really the product that CyrixIII/C3 descends all from WinChip of the Centaur design together.
  • A bridge is added to the back side with the package after the Ezra core and can operate FSB and clock magnification freely by operating the open closing of this bridge.
  • Three kinds of can packages exist in the Ezra core. 最初に登場したのは菓子缶をイメージし原材料名や内容量、「食べられません」などの注意書きをもじった日本語版のパッケージだが、後によりシンプルになった英語版のパッケージに変更された。 また2002 FIFAワールドカップをイメージした缶パッケージが存在する。 Nehemiah以降では英語版パッケージのみが使用された。
  • 組込向けのEBGA製品について当初はファンレス製品をEDEN、ファン冷却必要な製品をC3-Eとすると発表していた。しかし市場ではどちらもEDENとして扱われることが非常に多く、混乱が見られた。
  • EzraコアのC3ではCPUクーラーを外した状態で負荷をかけ続けるデモムービーがWebで公開された。競合製品が数秒でフリーズしたのに対し、C3は24時間以上の稼動を続け話題となった。
  • 当初発売されたC5XL Nehemiah製品は表面のキャパシタがEzra-Tより増加されていたが、後にアナウンス無くEzra-Tと同じに戻された。その為、一部ショップではC5XL Nehemiahの製品をEzra-Tと誤認するなどの混乱を生じた。


参考文献

関連項目

外部リンク

「https://ja.wikipedia.org/w/index.php?title=VIA_C3&oldid=63475210」から取得

This article is taken from the Japanese Wikipedia VIA C3

This article is distributed by cc-by-sa or GFDL license in accordance with the provisions of Wikipedia.

Wikipedia and Tranpedia does not guarantee the accuracy of this document. See our disclaimer for more information.

In addition, Tranpedia is simply not responsible for any show is only by translating the writings of foreign licenses that are compatible with CC-BY-SA license information.

0 개의 댓글:

댓글 쓰기

피드 구독하기: 댓글 (Atom)